SYSTEM OPEN-CIRCUIT TESTING METHOD
Number of patents in Portfolio can not be more than 2000
United States of America Patent
Stats
-
N/A
Issued Date -
Sep 23, 2010
app pub date -
Aug 31, 2009
filing date -
Mar 20, 2009
priority date (Note) -
Abandoned
status (Latency Note)
Importance
Abstract
A system open testing method is provided. Firstly, a system to be tested having at least an ESD protection unit, a signal input pad, a first voltage level end, and a second voltage level end is provided, wherein the first voltage level end and the second voltage level end are utilized for accessing electric power, the ESD protection unit has one end coupled to the signal input pad and the other end coupled to the first voltage level end. Afterward, a diode is connected to the signal input pad, and the conducting direction of the diode is opposite to that of the interior diode in the ESD circuit. Thereafter, a testing signal is send through the diode to the system.
First Claim
Family
International Classification(s)
- [Classification Symbol]
- [Patents Count]
Cited Art Landscape
Patent Citation Ranking
Recipient Email Address
Recipient Email Address
Comment
Recipient Email Address
Add to Portfolio(s)
To add this patent to one, or more, of your portfolios, simply click the add button.
This Patent is in these Portfolios:
Add to additional portfolios:
Last Refreshed On:
Changes done successfully