Method for forming fine pattern in semiconductor device
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United States of America Patent
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Oct 23, 2012
Grant Date -
Sep 16, 2010
app pub date -
Nov 13, 2009
filing date -
Mar 11, 2009
priority date (Note) -
Expired
status (Latency Note)
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Abstract
Disclosed is a method for manufacturing fine patterns of semiconductor devices using a double exposure patterning process for manufacturing the second photoresist patterns by simply exposing without an exposure mask. The method comprises the steps of: forming a first photoresist pattern on a semiconductor substrate on which a layer to be etched is formed; coating a composition for a mirror interlayer on the first photoresist pattern to form a mirror interlayer; forming a photoresist layer on the resultant; and forming a second photoresist pattern which is made by a scattered reflection of the mirror-interlayer and positioned between the first photoresist patterns, by exposing the photoresist layer to a light having energy which is lower than a threshold energy (Eth) of the photoresist layer without an exposure mask, and then developing the same.
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