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Abstract

An oscillator includes a control circuit and a ring of symmetric load delay cells. Each delay cell includes two novel symmetric loads. Each load involves a level shift circuit and a diode-connected transistor coupled in parallel with a current source-connected transistor. The control circuit converts an oscillator input signal into bias control signals that in turn control the effective resistance of the symmetric loads such that delays through the delay cells are a function of the input signal. The control circuit uses a symmetric load replica in a control loop to control the level shift circuits of the delay cells such that the oscillating delay cell output signals have a constant amplitude. In a first advantageous aspect, due to the constant amplitude, the oscillator is operable over a wide frequency range. In a second advantageous aspect, the oscillator input signal to output signal oscillation frequency has a substantially linear relationship.

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First Claim