Systems and methods for reduced latency loop recovery

Number of patents in Portfolio can not be more than 2000

United States of America Patent

PATENT NO 7957251
APP PUB NO 20100208574A1
SERIAL NO

12371906

Stats

ATTORNEY / AGENT: (SPONSORED)

Importance

Loading Importance Indicators... loading....

Abstract

See full text

Various embodiments of the present invention provide systems and methods for reduced latency feedback in a data processing system. For example, some embodiments provide a data processing system that includes a variable gain amplifier, a processing circuit, a data detector, and an error signal calculation circuit. The variable gain amplifier amplifies a data input signal and provides an amplified signal. The processing circuit generates a signal output corresponding to the amplified signal, and includes a conditional multiplication circuit. The conditional multiplication circuit conditionally multiplies the signal output by a gain correction signal and provides the result as an interim output. The data detector applies a data detection algorithm to the signal output and provides an ideal output. The error signal calculation circuit generates a gain correction signal based at least in part on the interim output and a derivative of the ideal output. The level of amplification by the variable gain amplifier is based at least in part on the gain correction signal.

Loading the Abstract Image... loading....

First Claim

See full text

Family

Loading Family data... loading....

Patent Owner(s)

Patent OwnerAddress
AVAGO TECHNOLOGIES INTERNATIONAL SALES PTE LIMITED1 YISHUN AVENUE 7 SINGAPORE 768923

International Classification(s)

  • [Classification Symbol]
  • [Patents Count]

Inventor(s)

Inventor Name Address # of filed Patents Total Citations
Ratnakar, Aravind Nayak Lancaster, US 11 214
Rauschmayer, Richard Longmont, US 50 909

Cited Art Landscape

Load Citation

Patent Citation Ranking

Forward Cite Landscape

Load Citation