NON-VOLATILE MEMORY SUBSYSTEM AND A MEMORY CONTROLLER THEREFOR
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United States of America Patent
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Issued Date -
Aug 5, 2010
app pub date -
Feb 4, 2009
filing date -
Feb 4, 2009
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Abandoned
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Abstract
In the present invention a non-volatile memory subsystem comprises a non-volatile memory device and a memory controller. The memory controller controls the operation of the non-volatile memory device with the memory controller having a processor for executing computer program instructions for partitioning the non-volatile memory device into a plurality of partitions, with each partition having adjustable parameters for wear level and data retention. The memory subsystem also comprises a clock for supplying timing signals to the memory controller.
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