PROCESSOR ASSIGNING CONTROL SYSTEM AND METHOD
Number of patents in Portfolio can not be more than 2000
United States of America Patent
Stats
-
N/A
Issued Date -
Jul 22, 2010
app pub date -
Mar 29, 2009
filing date -
Jan 16, 2009
priority date (Note) -
Abandoned
status (Latency Note)
Importance
Abstract
A processor assigning control system includes a first memory to store a plurality of control instructions and loading schedules, a second memory to temporarily store the plurality of control instructions and loading schedules, a real-time clock (RTC), and a main controller. The main controller includes a hardware detecting unit, a software obtaining unit, and a management unit. The RTC is configured for sending clock signal to make the hardware detecting unit detect whether a plurality of processors are in a normal state or an error state. The processor assigning control system is capable of detecting connection statues between the plurality of processor and a communication bus, and performance of the processors, to obtain and assign the control instructions to the corresponding processors to dynamically deploy the processors.
First Claim
Family
International Classification(s)
Cited Art Landscape
Patent Citation Ranking
Recipient Email Address
Recipient Email Address
Comment
Recipient Email Address
Add to Portfolio(s)
To add this patent to one, or more, of your portfolios, simply click the add button.
This Patent is in these Portfolios:
Add to additional portfolios:
Last Refreshed On:
Changes done successfully