EMBEDDING AND TRANSMITTING DATA SIGNALS FOR GENERATING A DISPLAY PANEL
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United States of America Patent
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Issued Date -
Jun 10, 2010
app pub date -
Dec 9, 2008
filing date -
Dec 9, 2008
priority date (Note) -
Abandoned
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Abstract
Row propagation delay is the duration it takes for a signal to travel the length of a row in a flat panel display matrix. Row propagation delay compensation modifies when column voltages are applied to each column in a flat panel matrix by substantially matching the delay for its position relative to the length of the row. A ternary signal generated by the timing controller with embedded clock and data information is buffered at the timing controller and transmitted to each column driver as required to substantially match row propagation delay while minimizing system interconnects and column driver circuitry.
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