MEMORY CONTROLLER AND A METHOD OF OPERATING AN ELECTRICALLY ALTERABLE NON-VOLATILE MEMORY DEVICE
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United States of America Patent
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Issued Date -
Jun 3, 2010
app pub date -
Dec 2, 2008
filing date -
Dec 2, 2008
priority date (Note) -
Abandoned
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Abstract
A controller operates a NAND non-volatile memory device which has an array of non-volatile memory cells. The array of non-volatile memory cells is susceptible to suffering loss of data stored in one or more memory cells of the array. The controller interfaces with a host device and receives from the host device a time-stamp signal. The controller comprises a processor, and a memory having program code stored therein for execution by the processor. The program code is configured to receive by the controller the time stamp signal from the host device; to compare the received time stamp signal with a stored signal wherein the stored signal is a time stamp signal received earlier in time by the controller from the host device; and to determine when to perform a data retention and refresh operation for data stored in the memory array based upon the comparing step.
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