INTEGRATED CIRCUIT PACKAGE
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United States of America Patent
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Issued Date -
Jun 3, 2010
app pub date -
Dec 2, 2009
filing date -
Dec 3, 2008
priority date (Note) -
Abandoned
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Abstract
An integrated circuit package comprising at least two printed circuit boards each comprising a substrate coated with metallic layers on both sides and having plated through-holes for electrical and thermal connection to the metallic layers, at least two of the printed circuit boards being diffusion-bonded at an interface between their respective metallic layers, the bonded metallic layers forming an hermetic seal between the opposed external surfaces of the integrated circuit package.
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