Method and Apparatus for Circuit Simulation
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United States of America Patent
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Issued Date -
May 20, 2010
app pub date -
Nov 17, 2008
filing date -
Nov 17, 2008
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Abandoned
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Abstract
A method of preparing a circuit simulator, said method comprising initializing a normalized adjusted gate voltage value. Then performing the steps of determining a normalized adjusted gate voltage datum in dependence upon the initial normalized adjusted gate voltage value. Storing the normalized adjusted gate voltage datum at a memory address in a one-dimensional array based on the normalized adjusted gate voltage. Decrementing the normalized adjusted gate voltage value by a predetermined decrement amount. And verifying the decremented gate voltage value. Then repeating until a stop gate voltage value is reached.
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