LARGE INTEGER SUPPORT IN VECTOR OPERATIONS
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United States of America Patent
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Issued Date -
May 6, 2010
app pub date -
Oct 31, 2008
filing date -
Oct 31, 2008
priority date (Note) -
Abandoned
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Abstract
A vector processor or vector processing computer has a first vector register operable to store two or more vector elements that together comprise a single first large integer and a second vector register operable to store two or more vector elements that together comprise a single second large integer. An adder having a carry-in bit is operable to add the large integer in the first vector register to the large integer in the second vector register by using the carry-in bit to add sequential elements of the vector registers.
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