INTEGRATED CIRCUIT SYSTEM EMPLOYING STRESS-ENGINEERED LAYERS
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United States of America Patent
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Issued Date -
May 6, 2010
app pub date -
Oct 30, 2008
filing date -
Oct 30, 2008
priority date (Note) -
Abandoned
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Abstract
An integrated circuit system that includes: providing a substrate including an active device; forming a trench within the substrate adjacent the active device; forming a first layer with a first lattice constant within the trench; and forming a second layer with a second lattice constant over the first layer, the second lattice constant differing from the first lattice constant.
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