DUAL MODE ERROR CORRECTION CODE (ECC) APPARATUS FOR FLASH MEMORY AND METHOD THEREOF
Number of patents in Portfolio can not be more than 2000
United States of America Patent
Stats
-
N/A
Issued Date -
Apr 22, 2010
app pub date -
Oct 16, 2008
filing date -
Oct 16, 2008
priority date (Note) -
Abandoned
status (Latency Note)
Importance
Abstract
A dual mode error correction code (ECC) apparatus for the flash memory and method thereof are described. The dual mode error correction code (ECC) apparatus includes a syndrome detection unit, a first ECC unit, a second ECC unit, a switch module, and an interface module. The syndrome detection unit detects the data content for computing the amount of errors in the data content to determine whether the amount of the errors exceeds a pre-determined threshold value. The first ECC unit corrects the errors in the data content based on a first coding mode. The second ECC unit corrects the errors in the data content based on a second coding mode. The switch module either switches to the first ECC unit for activating the first coding mode of the first ECC unit if the amount of the errors is fewer than a pre-determined threshold value or switches to the second ECC unit for activating the second coding mode of the second ECC unit if the amount of the errors is greater than the pre-determined threshold value.
First Claim
Family
International Classification(s)
- [Classification Symbol]
- [Patents Count]
Cited Art Landscape
Patent Citation Ranking
Recipient Email Address
Recipient Email Address
Comment
Recipient Email Address
Add to Portfolio(s)
To add this patent to one, or more, of your portfolios, simply click the add button.
This Patent is in these Portfolios:
Add to additional portfolios:
Last Refreshed On:
Changes done successfully