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United States of America Patent

APP PUB NO 20100096695A1
SERIAL NO

12252368

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Abstract

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A semiconductor device that includes a substrate having an active region prepared with a transistor is presented. The semiconductor device includes a stress structure adjacent to the substrate. The stress structure includes a dielectric layer having nanocrystals embedded therein. The nanocrystals induce a first or a second stress on a channel region of the transistor which improves carrier mobility of the transistor.

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Patent Owner(s)

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CHARTERED SEMICONDUCTOR MANUFACTURING LTD60 WOODLANDS INDUSTRIAL PARK D STREET 2 SINGAPORE 73840

International Classification(s)

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  • 2008 Application Filing Year
  • H01L Class
  • 14823 Applications Filed
  • 10962 Patents Issued To-Date
  • 73.96 % Issued To-Date
Click to zoom InYear of Issuance% of Matters IssuedCumulative IssuancesYearly Issuances200820092010201120122013201420152016201720182019202020212022202320240255075100

Inventor(s)

Inventor Name Address # of filed Patents Total Citations
Chew, Han Guan Singapore, SG 3 19
Liu, Jinping Singapore, SG 83 1122
See, Alex Kh Singapore, SG 17 106
Zhou, Mei Sheng Singapore, SG 133 2512

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Citation count rangeNumber of patents cited in rangeNumber of patents cited in various citation count ranges10417069704922861911147665453015101 - 1011 - 2021 - 3031 - 4041 - 5051 - 6061 - 7071 - 8081 - 9091 - 100100 +0100200300400500600700800900100011001200130014001500160017001800

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