Method for Forming Through-base Wafer Vias in Fabrication of Stacked Devices
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United States of America Patent
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Issued Date -
Apr 1, 2010
app pub date -
Sep 30, 2008
filing date -
Sep 30, 2008
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Abandoned
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Abstract
An effective method for forming through-base wafer vias in the fabrication of stacked devices is described. The base wafer can be a silicon wafer in which case the method relates to TSV (through-silicon via) technology. The method affords high removal rates of both silicon and metal (e.g., copper) under appropriate conditions and is tuneable with respect to base wafer material to metal selectivity.
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