Flash memory system and operation method
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United States of America Patent
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Issued Date -
Mar 11, 2010
app pub date -
Mar 17, 2009
filing date -
Sep 5, 2008
priority date (Note) -
Abandoned
status (Latency Note)
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Abstract
The present invention discloses a flash memory system comprising: a cache memory, a cache memory interface, a host interface, a flash memory interface, and a microprocessor The cache memory interface contains an arbitrator for performing data bus bandwidth time sharing process to access the cache memory The host interface is used for receiving data from a host system, and storing the data into the cache memory to form ready data The flash memory interface reads the ready data from the cache memory and stores it into at least one flash memory The microprocessor is used for controlling the host interface and the flash memory interface to access the cache memory Hence, the present invention can achieve the purpose of enhancing the access efficiency and increasing the life of the flash memory
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