METHOD FOR PREPARING MULTI-LEVEL FLASH MEMORY DEVICES
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United States of America Patent
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Issued Date -
Mar 11, 2010
app pub date -
Sep 10, 2008
filing date -
Sep 10, 2008
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Abandoned
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Abstract
A method for preparing a multi-level flash memory device comprises forming a dielectric stack including a charge-trapping layer on a semiconductor substrate, forming an insulation structure having a depression on the charge-trapping layer, removing a portion of the charge-trapping layer from the depression such that the charge-trapping layer is segmented to form a plurality of storage nodes, forming a gate oxide layer isolating the storage nodes and forming a damascene gate including a polysilicon layer filling the depression.
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