MOS Transistor Including Extended NLDD Source-Drain Regions For Improved Ruggedness

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United States of America Patent

SERIAL NO

12578539

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Abstract

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A MOS transistor includes a conductive gate insulated from a semiconductor layer by a dielectric layer, first and second lightly-doped diffusion regions formed self-aligned to respective first and second edges of the conductive gate, a first diffusion region formed self-aligned to a first spacer, a second diffusion region formed a first distance away from the edge of a second spacer, a first contact opening and metallization formed above the first diffusion region, and a second contact opening and metallization formed above the second diffusion region. The first lightly-doped diffusion region remains under the first spacer. The second lightly-doped diffusion region remains under the second spacer and extends over the first distance to the second diffusion region. The distance between the first edge of the conductive gate to the first contact opening is the same as the distance between the second edge of the conductive gate to the second contact opening.

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Patent OwnerAddress
MICREL INC2180 FORTUNE DRIVE SAN JOSE CA 95131

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Inventor(s)

Inventor Name Address # of filed Patents Total Citations
Alter, Martin Los Altos, US 26 348

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