Method of fabricating super trench MOSFET including buried source electrode

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United States of America Patent

SERIAL NO

12586906

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Abstract

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A method of fabricating a trench MOSFET, the lower portion of the trench containing a buried source electrode which is insulated from the epitaxial layer and semiconductor substrate but in electrical contact with the source region. When the MOSFET is in an “off” condition, the bias of the buried source electrode causes the “drift” region of the mesa to become depleted, enhancing the ability of the MOSFET to block current. The doping concentration of the drift region can therefore be increased, reducing the on-resistance of the MOSFET. The buried source electrode also reduces the gate-to-drain capacitance of the MOSFET, improving the ability of the MOSFET to operate at high frequencies. The substrate may advantageously include a plurality of annular trenches separated by annular mesas and a gate metal layer that extends outward from a central region in a plurality of gate metal legs separated by source metal regions.

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Patent Owner(s)

Patent OwnerAddress
SILICONIX INCORPORATED2585 JUNCTION AVENUE SAN JOSE CALIFORNIA 95134-1923 95134-1923

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Inventor(s)

Inventor Name Address # of filed Patents Total Citations
Bai, Yuming Union City, US 19 382
Chen, Kuo-In Los Altos, US 33 636
Lui, Kam Hong Santa Clara, US 14 297
Pattanayak, Deva N Saratoga, US 27 623
Shi, Sharon San Jose, US 19 364
Terrill, Kyle Santa Clara, US 71 884
Xu, Robert Fremont, US 19 412
Yue, Christiana Milpitas, US 8 215

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