METHOD FOR HEAT-TREATING SILICON WAFER

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United States of America Patent

APP PUB NO 20100009548A1
SERIAL NO

12438786

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Abstract

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Provided is a heat treatment method wherein generation of slip dislocation in silicon wafer RTP is suppressed, in order to solve a problem of not sufficiently suppressing generation of slip dislocation of silicon wafers in conventional RTP. A step is provided for suspending temperature rising for 10 seconds or longer at a temperature in a range of over 700° C. to below 950° C., so as to prevent generation of slip dislocation during rapid heating, at least at a silicon wafer portion that contacts with a supporting section of a rapid heating apparatus or at a portion on the outermost circumference section of the silicon wafer.

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Patent Owner(s)

Patent OwnerAddress
SUMCO TECHXIV CORPORATIONOMURA-SHI NAGASAKI 856-8555

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Inventor(s)

Inventor Name Address # of filed Patents Total Citations
Nakajima, Tomoko Nagasaki, JP 10 32
Nakamura, Kozo Nagasaki, JP 235 4020
Shimura, Seiichi Nagasaki, JP 2 8

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