METHOD OF CONSTRUCTING CMOS DEVICE TUBS
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United States of America Patent
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Issued Date -
Jan 14, 2010
app pub date -
Jul 10, 2008
filing date -
Jul 10, 2008
priority date (Note) -
Abandoned
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Abstract
The present invention provides a method of fabricating an integrated circuit comprising at least one bipolar transistor and at least one field effect transistor. The method includes implanting a dopant species of a first type in a semiconductor layer that is doped with a dopant of a second type opposite the first type to form at least one sinker that contacts at least one collector of said at least one bipolar transistor. The method also includes applying heat to cause the dopant species to diffuse outwards to form at least one doped extension of said at least one sinker and forming said at least one field effect transistor in the doped extension.
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