HIGH DENSITY HIGH PERFORMANCE POWER TRANSISTOR LAYOUT
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United States of America Patent
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N/A
Issued Date -
Nov 26, 2009
app pub date -
May 22, 2008
filing date -
May 22, 2008
priority date (Note) -
Abandoned
status (Latency Note)
Importance
Abstract
A power transistor comprises a gate region, a source region, and a drain region. The gate region comprises a first line portion, a second line portion, and a third line portion. The first line portion couples to the second line portion so as to form a first V-shaped structure. The second line portion couples to the third line portion so as to form a second V-shaped structure. The first line portion, the second line portion, and the third line portion form a N-shaped structure.
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