NMOS Transistor Including Extended NLDD-Drain For Improved Ruggedness

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United States of America Patent

APP PUB NO 20090283843A1
SERIAL NO

12119819

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ATTORNEY / AGENT: (SPONSORED)

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Abstract

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A MOS transistor includes a conductive gate insulated from a semiconductor layer by a first dielectric layer, lightly-doped source/drain regions being formed self-aligned to respective first and second edges of the conductive gate, a source region being formed self-aligned to a first spacer, a drain region being formed a first distance away from the edge of a second spacer, a source contact opening and source metallization formed above the source region, and a drain contact opening and drain metallization formed above the drain region. The lightly-doped source region remains under the first spacer while the lightly-doped drain region remains under the second spacer and extends over the first distance to the drain region. The distance between the first edge of the conductive gate to the source contact opening is the same as the distance between the second edge of the conductive gate to the drain contact opening.

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Patent Owner(s)

Patent OwnerAddress
MICREL INC2180 FORTUNE DRIVE SAN JOSE CA 95131

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Inventor(s)

Inventor Name Address # of filed Patents Total Citations
Alter, Martin Los Altos , US 26 348

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