Semiconductor array and method for manufacturing a semiconductor array

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United States of America Patent

APP PUB NO 20090258472A1
SERIAL NO

11528400

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Abstract

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Method for manufacturing a semiconductor array, in which a conductive substrate (100), a component region (400), and an insulation layer (200), isolating the component region (400) from the conductive substrate (100), are formed, a trench (700) is etched in the component region (400) as far as the insulation layer (200), then the trench (700) is etched further as far as the conductive substrate (100), the walls (701) of the trench (700) are formed with an insulation material (710), and an electrical conductor (750, 755, 760) is introduced into the trench (700) and connected conductively to the conductive substrate (100),wherein before the trench (700) is etched, a layer sequence comprising a first oxide layer (510), a polysilicon layer (520) on top of the first oxide layer (510), and a second oxide layer (530) on top of the polysilicon layer (520) is applied to the component region (400).

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Patent Owner(s)

Patent OwnerAddress
ATMEL GERMANY GMBHTHE GERMAN CITY OF HEILBRONN THRASEA STREET NO 2

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Inventor(s)

Inventor Name Address # of filed Patents Total Citations
Florian, Tobias Stuttgart , DE 4 34
Graf, Michael Leutenbach , DE 76 919
Schwantes, Stefan Heilbronn , DE 20 117

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