MEMORY WITH EMBEDDED ASSOCIATIVE SECTION FOR COMPUTATIONS
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United States of America Patent
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Issued Date -
Oct 8, 2009
app pub date -
May 12, 2008
filing date -
Apr 2, 2008
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Abstract
An integrated circuit device includes a semiconductor substrate and an array of random access memory (RAM) cells, which are arranged on the substrate in first columns and are configured to store data. A computational section in the device includes associative memory cells, which are arranged on the substrate in second columns, which are aligned with respective first columns of the RAM cells and are in communication with the respective first columns so as to receive the data from the array of the RAM cells and to perform an associative computation on the data.
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