Phase change random access memory and layout method of the same

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United States of America Patent

PATENT NO 7885100
SERIAL NO

12332787

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Abstract

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A phase change random access memory (PRAM) includes a cell array divided into an active region and a dummy active region. A bitline is formed across the active region and the dummy active region and a global wordline is formed in the active region so as to intersect with the bitline. The cell array includes a phase change memory cell formed at an intersection point of the bitline and the global wordline that is electrically connected with the bitline and the global wordline. The cell array further includes a phase change dummy cell formed below the bitline in the dummy active region that is electrically isolated from the bitline. The dummy cell maintains a turn-off state as the dummy cell and the bitline are electrically isolated from each other.

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Patent Owner(s)

Patent OwnerAddress
HYNIX SEMICONDUCTOR INCICHON-SI KYOUNGKI-DO 467-701

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Inventor(s)

Inventor Name Address # of filed Patents Total Citations
Park, Hae Chan Seoul, KR 67 528

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