Method of fabricating non-volatile memory device having separate charge trap patterns
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United States of America Patent
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May 31, 2011
Grant Date -
Sep 3, 2009
app pub date -
May 11, 2009
filing date -
Nov 7, 2006
priority date (Note) -
Expired
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Abstract
A method of fabricating a non-volatile memory device includes forming an isolation trench in a semiconductor substrate, and the isolation trench defines first and second fins. The method further includes forming an isolation layer partially filling the isolation trench, forming first and second charge trap patterns respectively covering parts of the first and second fins projecting from the isolation layer, and forming a control gate electrode covering the first and second charge trap patterns and crossing the first and second fins.
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