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Abstract

An apparatus for decoding a Low Density Parity Check (LDPC) is provided. The apparatus includes a variable node message memory for storing a variable node message vector, a controller for controlling a node computing unit to read from and write to the variable node message memory and controlling an iteration process for the apparatus, and a node computing unit for updating a check node message and a variable node message, and determining a hard decision message, the node computing unit includes a variable node message generation unit for determining the variable node message for use in a check node message calculation unit according to the variable node message vector, a check node message calculation unit for updating the check node message, a variable node message updating unit for updating a corresponding variable node message, a hard decision calculation unit for determining the hard decision message for a corresponding variable node, and a parity check unit for determining a parity bit and outputting the parity bit to a decoding termination controller.

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