Plasma Display panel and plasma display
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United States of America Patent
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Issued Date -
Jun 25, 2009
app pub date -
Aug 26, 2005
filing date -
Aug 26, 2005
priority date (Note) -
Abandoned
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Abstract
A technology for the four-electrode type PDP for preventing the lowering of luminance depending on the display load ratio due to the voltage drop at electrode by mitigating concentration of discharge timing. On a front substrate of a PDP (10), a first (X) electrode, a second (Y) electrode, and a third (Z) electrode therebetween are arranged in parallel in a first direction. Between Substrates, barrier ribs for sectioning cells 3 of respective colors of R, G, B and phosphor layers of respective colors are provided. In the respective cells (3), an interval of the X, Y electrodes is roughly constant. It is a structure where intervals between the X, Y electrodes and the Z electrode (XZ, YZ) are different. Particularly, an interval of R is narrow and an interval of B is wide.
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