Semiconductor array and method for manufacturing a semiconductor array
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United States of America Patent
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Issued Date -
Jun 25, 2009
app pub date -
Sep 28, 2006
filing date -
Sep 29, 2005
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Abandoned
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Abstract
Semiconductor array and method for manufacturing a semiconductor array, wherein a conductive substrate (100), an element region (400), and an insulation layer (200), isolating the element region (400) from the conductive substrate (100), are formed, a trench (700) is etched in the element region (400) as far as the insulation layer (200), the trench (700) is etched further in the insulation layer (200) as far as the conductive substrate (100), and within the trench (700), the conductive substrate (100) is at least partially etched to form conductive substrate regions (141, 142, 143, 144, 145, 146), isolated from one another.
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