Driving Method of Plasma Display Panel and Plasma Display Device
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United States of America Patent
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Issued Date -
Jun 18, 2009
app pub date -
Feb 1, 2006
filing date -
Feb 1, 2006
priority date (Note) -
Abandoned
status (Latency Note)
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Abstract
In a technique of a PDP having a four-electrode structure of (X, Y, Z, and A), the technique capable of preventing a delay of a discharge timing due to a voltage applied to the Z electrode is provided. In the four-electrode product structure of (X, Y, Z, and A) and a PDP in which rows are formed at both sides of a Y electrode, for a voltage waveform applied to each electrode (for example, X1, Zo, Y1, Ze, X2, Zo, and Y2) from the drive circuit side, a voltage (Vt) of the narrow width trigger pulse (65) of a positive polarity applied to the Z electrode is configured to be a voltage higher than the voltage (Vs) of the sustain pulses of X and Y (45, 46, 55, and 56).
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