Importance

Loading Importance Indicators...

Abstract

This invention relates to hardware acceleration of signal processing systems for displaying an image using holographic techniques. A hardware accelerator for a holographic image display system, the image display system being configured to generate a displayed image using a plurality of holographically generated temporal subframes, said temporal subframes being displayed sequentially in time such that they are perceived as a single reduced-noise image, each said subframe being generated holographically by modulation of a spatial light modulator with holographic data such that replay of a hologram defined by said holographic data defines a said subframe, the hardware accelerator comprising: an input buffer to store image data defining said displayed image; an output buffer to store holographic data for a said subframe; at least one hardware data processing module coupled to said input data buffer and to said output data buffer to process said image data to generate said holographic data for a said subframe; and a controller coupled to said at least one hardware data processing module to control said at least one data processing module to provide holographic data for a plurality of said subframes corresponding to image data for a single said displayed image to said output data buffer.

Loading the Abstract Image...

First Claim