Low Dropout Voltage Regulator
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United States of America Patent
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Issued Date -
May 21, 2009
app pub date -
May 19, 2008
filing date -
Nov 21, 2007
priority date (Note) -
Abandoned
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Abstract
Improved designs of an LDO voltage regulator with ultra low quiescent current are disclosed. According to one embodiment, an LDO voltage regulator is designed to completely cancel an intermediate gain stage while decreasing a quiescent current and to stabilize a loop circuit by means of two zeros introduced in a frequency transfer function thereof. Such a LDO voltage regulator does not increase the power consumption and applicable in many circuits used in electronic devices.
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