MULTI-FIN FIELD EFFECT TRANSISTOR

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United States of America Patent

SERIAL NO

12357410

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Abstract

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A multi-fin field effect transistor includes a substrate, an oxide layer, a conductive layer, a gate oxide layer, and a doped region. The substrate is surrounded by a trench, and there are at least two fin-type silicon layers formed in the substrate in a region prepared to form a gate thereon. The oxide layer is disposed in the trench and the top surface of the oxide layer is lower than that of the fin-type silicon layers. The conductive layer is disposed in the region prepared to form a gate. The top surface of the conductive layer is higher than that of the fin-type silicon layers. The gate oxide layer is disposed between the conductive layer and the fin-type silicon layers and disposed between the conductive layer and the substrate. The doped region is disposed in the substrate on both sides of the conductive layer.

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Patent Owner(s)

Patent OwnerAddress
PROMOS TECHNOLOGIES INC3F NO 19 LI-HSIN ROAD SCIENCE-BASED INDUSTRIAL PARK HSIN-CHU CITY

International Classification(s)

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  • 2009 Application Filing Year
  • H01L Class
  • 14618 Applications Filed
  • 11145 Patents Issued To-Date
  • 76.25 % Issued To-Date
Click to zoom InYear of Issuance% of Matters IssuedCumulative IssuancesYearly Issuances2009201020112012201320142015201620172018201920202021202220230255075100

Inventor(s)

Inventor Name Address # of filed Patents Total Citations
Wu, Hsiao Che Taoyuan Hsien, TW 18 84

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  • H01L Class
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  • 16 Age
Citation count rangeNumber of patents cited in rangeNumber of patents cited in various citation count ranges7814908714622651381027160483613101 - 1011 - 2021 - 3031 - 4041 - 5051 - 6061 - 7071 - 8081 - 9091 - 100100 +01002003004005006007008009001000110012001300140015001600

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