METHOD FOR CLAMPING A SEMICONDUCTOR REGION AT OR NEAR GROUND

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United States of America Patent

APP PUB NO 20090121770A1
SERIAL NO

12033600

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ATTORNEY / AGENT: (SPONSORED)

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Abstract

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A clamping circuit clamps a voltage received by an n-type semiconductor region without using a Schottky transistor. The clamping circuit includes a current mirror as well as first and second bipolar transistors. The current mirror receives a first current and supplies a second current in response. The first current is received by the first bipolar transistor, and the second current is received by the second bipolar transistor. The difference between the base-emitter junction voltages of the first and second bipolar transistors, in part, defines the voltage at which the n-type region is clamped. To start-up the circuit properly, current is withdrawn from the base/gate terminals of the transistors disposed in the current mirror. The circuit optionally includes a pair of cross-coupled transistors to reduce the output impedance and improve the power supply rejection ratio.

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Patent Owner(s)

Patent OwnerAddress
ANALOG DEVICES INTERNATIONAL UNLIMITED COMPANYBAY F1 RAHEEN INDUSTRIAL ESTATE CO LIMERICK LIMERICK

International Classification(s)

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  • 2008 Application Filing Year
  • H03K Class
  • 1917 Applications Filed
  • 1089 Patents Issued To-Date
  • 56.81 % Issued To-Date

Inventor(s)

Inventor Name Address # of filed Patents Total Citations
Dobkin, Robert C Monte Sereno, US 56 1312
Rankin, Samuel Patrick Phoenix, US 2 6

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Citation count rangeNumber of patents cited in rangeNumber of patents cited in various citation count ranges3147322799492619115662501 - 1011 - 2021 - 3031 - 4041 - 5051 - 6061 - 7071 - 8081 - 9091 - 100100 +0255075100125150175200225250275300325350375400425450475500

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