System and Method for Substrate with Interconnects and Sealing Surface
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United States of America Patent
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Issued Date -
Apr 9, 2009
app pub date -
Sep 12, 2008
filing date -
Oct 5, 2007
priority date (Note) -
Abandoned
status (Latency Note)
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Abstract
A method includes providing a base. At least one lead is deposited on the base, the at least one lead including a trace of electrically conductive material having a first end and a second end. A dielectric layer is deposited on a portion of the at least one lead between the first end and the second end. A sealing surface is deposited on a portion of the dielectric layer, the sealing surface including a contiguous shape of metal separating an enclosed area of the base located inside the contiguous shape from an open area of the base located outside the contiguous shape. The first end of the at least one lead is located in the enclosed area and the second end of the at least one lead is located in the open area. Moreover, the dielectric layer electrically insulates the at least one lead from the sealing surface.
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