Packaging substrate structure having semiconductor chip embedded therein and fabricating method thereof
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United States of America Patent
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Issued Date -
Apr 2, 2009
app pub date -
Oct 1, 2008
filing date -
Oct 1, 2007
priority date (Note) -
Abandoned
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Abstract
The present invention relates to a packaging substrate structure having an semiconductor chip embedded therein and a method for manufacturing the same. The structure comprises: a substrate body having a through cavity, wherein the substrate body is a multilayer board which comprises a core board and a first built-up structure disposed on each of the opposite surfaces of the core board; an semiconductor chip disposed and fixed in the cavity, wherein the active surface of the semiconductor chip has a plurality of electrode pads thereon; and a second built-up structure disposed on at least one surface of the substrate body as well as the surface of the semiconductor chip, wherein the second built-up structure has a plurality of conductive vias conducting to the first built-up structure. The present invention can reduce the stress imposed on the surface of the semiconductor chip and increase the reliability of the whole package structure.
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