Semiconductor device testing apparatus
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United States of America Patent
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Issued Date -
Mar 26, 2009
app pub date -
Sep 25, 2007
filing date -
Sep 25, 2007
priority date (Note) -
Abandoned
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Abstract
A semiconductor device testing apparatus includes a test head Hifix, a tester coupled to the test head Hifix, two or more device-under-tests (DUTs), and one or more processor devices disposed on the test head Hifix and coupled to the DUTs for transmitting and receiving test signals between the tester and the DUTs and for receiving and processing a number of test signals from the DUTs into a single output signal and for transmitting the output signal to the tester for testing purposes. The tester may generate and transmit test signals to the test head Hifix and the DUTs for testing the DUTs to ensure that the DUTs function properly in the consumer domain.
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