CO-PACKAGED HIGH-SIDE AND LOW-SIDE NMOSFETS FOR EFFICIENT DC-DC POWER CONVERSION
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United States of America Patent
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Issued Date -
Mar 5, 2009
app pub date -
Aug 31, 2007
filing date -
Aug 31, 2007
priority date (Note) -
Abandoned
status (Latency Note)
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Abstract
A circuit package assembly is disclosed. The assembly includes a conductive substrate; a high-side n-channel metal oxide semiconductor field effect transistor (NMOSFET) having a source on a side facing a surface of the conductive substrate and in electrical contact therewith and a low-side standard n-channel metal oxide semiconductor field effect transistor (NMOSFET) having a drain on a side facing the conductive substrate and in electrical contact therewith. Co-packaging of high-side and low-side NMOSFETs in this manner may reduce package size and parasitic inductance and capacitance compared to conventional packaging.
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