SEMICONDUCTOR CHIP WITH SOLDER BUMP AND METHOD OF FABRICATING THE SAME
Number of patents in Portfolio can not be more than 2000
United States of America Patent
Stats
-
N/A
Issued Date -
Feb 5, 2009
app pub date -
Nov 1, 2006
filing date -
Feb 20, 2006
priority date (Note) -
Abandoned
status (Latency Note)
Importance
Abstract
A semiconductor chip having a solder bump and a method of fabricating the same are provided. The semiconductor chip includes at least one under bump metal (UBM) layer formed on an electrode pad of the semiconductor chip, an adhesion enhance layer (AEL) formed on the UBM layer and having at least one concavo-convex portion on a top surface thereof, and the solder bump formed on the AEL. Thereby, adhesive solder bump is increased, and thereby the reliability of the semiconductor chip can be improved. Further, it is possible to prevent tin (Sn) in the solder bump from being diffused due to the AEL.
First Claim
Family
International Classification(s)
Cited Art Landscape
Patent Citation Ranking
Recipient Email Address
Recipient Email Address
Comment
Recipient Email Address
Add to Portfolio(s)
To add this patent to one, or more, of your portfolios, simply click the add button.
This Patent is in these Portfolios:
Add to additional portfolios:
Last Refreshed On:
Changes done successfully