Multiphase DLL using 3-edge phase detector for wide-range operation
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United States of America Patent
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Issued Date -
Jan 8, 2009
app pub date -
Oct 26, 2007
filing date -
Jul 6, 2007
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Abandoned
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Abstract
The invention discloses a new architecture of multiphase delay-locked loop (DLL) with innovative 3-edge phase detector (3-edge PD), which compares the VCDL's first delay interval and the last delay interval to send an Up pulse or a Dn pulse to adjust the interval among those delay clock phases. The DLL may achieve both wide-range operation and multiple clock phase generation, and is also immune to multi-selection problem.
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