Package Structure with Flat Bumps for Integrate Circuit or Discrete Device and Method of Manufacture the Same
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United States of America Patent
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Issued Date -
Dec 25, 2008
app pub date -
Apr 6, 2006
filing date -
Apr 7, 2005
priority date (Note) -
Abandoned
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Abstract
The invention discloses a novel package structure of integrate circuit or discrete device and packaging method, and includes the lead pins adjacent to the island; another metal layer formed at the bottom of the island; another metal layer formed at the bottom of lead pins; chip mounted on the island; wires bonded between the chip and the lead pins; the molded body encapsulating the top surface and side surface of the island and the lead pins, small protrusions of the island and the lead pins below the molded body; in the individual package, the number of the island can be one or more, lead pins can be arrayed at one side of the island, also can be arrayed at two sides or three sides of the island, one or two rows of lead pins can be located around the island. The invention provides strong welding, good quality, low cost, smooth production, wide applicability, flexible arrangement of the chips.
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