Dynamic-Verification-Based Verification Apparatus Achieving High Verification Performance and Verification Efficiency and the Verification Methodology Using the Same

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United States of America Patent

APP PUB NO 20080306721A1
SERIAL NO

10591910

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Abstract

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The present invention relates to a simulation-based verification apparatus and a verification method, which enhance the simulation performance and efficiency greatly, for verifying a digital system containing at least million gates. Also, the present invention relates to a simulation-based verification apparatus and a verification method used together with formal verification, simulation acceleration, hardware emulation, and prototyping to achieve the high verification performance and efficiency for verifying a digital system containing at least million gates.

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Patent Owner(s)

Patent OwnerAddress
YANG SEI YANGNot Provided

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Inventor(s)

Inventor Name Address # of filed Patents Total Citations
Yang, Sei Yang Pusan, KR 4 135

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