Importance

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Abstract

A device is provided that includes a processor, a peripheral unit, and a first logic, and to a method for generating an acknowledgment signal. The processor is clocked by a processor clock signal, which runs asynchronously to the peripheral clock signal, by which the peripheral unit is clocked. The peripheral unit sends an interrupt request synchronously to the peripheral clock signal to the processor, which thereupon is woken up from its idle state, to process the interrupt request in its working state. After the processing or during the processing of the interrupt request, the processor generates an acknowledgment signal synchronous to the processor clock signal. The first logic generates an acknowledgment signal, which is synchronous to the peripheral clock signal and by which the peripheral unit is informed about the processed interrupt request, from the acknowledgment signal synchronous to the processor clock signal.

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First Claim