METHOD OF SELECTIVELY POWERING MEMORY DEVICE
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United States of America Patent
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Issued Date -
Oct 30, 2008
app pub date -
Oct 31, 2007
filing date -
Feb 2, 2007
priority date (Note) -
Abandoned
status (Latency Note)
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Abstract
An approach to selectively powering a memory device is provided to improve the writeability of static random access memory (SRAM) cells without adversely compromising their stability. For example, various methods are provided to permit the voltage or current of a power supply line connected with one side of an SRAM cell to drop during write operations. This drop weakens one side of the SRAM cell and reduces the drive-fight between transistors of the SRAM cell and external write circuitry. As a result, the minimum voltage for writing new logic states into the SRAM cell is reduced to permit overall lower operating voltages for the SRAM cell and related circuitry. By continuing to maintain a second side of the SRAM cell at the reference voltage or current, the SRAM cell can successfully switch to a newly written logic state.
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