Package Structure With Flat Bumps For Electronic Device and Method of Manufacture the Same
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United States of America Patent
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Issued Date -
Oct 23, 2008
app pub date -
Apr 6, 2006
filing date -
Apr 7, 2005
priority date (Note) -
Abandoned
status (Latency Note)
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Abstract
The invention discloses an ultra thin package structure of leadless electronic device and the packaging method, and includes lead support base adjacent to the chip support base; chip mounted on the chip support base; wires bonded between chip and lead support base; the molded body encapsulating the top surface and side surface of the chip support base, small protrusions of the chip support base and lead support base below the molded body; in the individual package, the number of the chip support base island can be one or more, the lead pins can be arrayed at one side of the island, also can be arrayed at two sides or three sides of the island, one or two rows of lead pins can be located around the island.
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