Method and System for Providing Error Resiliency
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United States of America Patent
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Issued Date -
Oct 16, 2008
app pub date -
Apr 13, 2007
filing date -
Apr 13, 2007
priority date (Note) -
Abandoned
status (Latency Note)
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Abstract
A method and system for providing error resiliency in processing a multimedia bitstream. The bitstream includes a start code pattern and the method and system detect the start code pattern and track its location to prevent the bitstream processor from overrunning the start code pattern of a subsequent block of multimedia data and corrupting the subsequent block of data. A shift length limiter receives a location of the start code pattern and the location of a current bit pointer. The shift length limiter calculates the number of bits between the start code pattern location and the current bit pointer location. When the shift length limiter receives a bit shift request, the shift length limiter prevents shifting if the number of bits in the bit shift request exceeds the calculated number of bits between the start code pattern location and the current bit pointer location.
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