DESIGN STRUCTURE FOR IMPLEMENTING IMPROVED WRITE PERFORMANCE FOR PCRAM DEVICES

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United States of America Patent

SERIAL NO

11851036

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Abstract

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A design structure embodied in a machine readable medium used in a design process includes a circuit for implementing a write operation for a programmable resistive random access memory array, the circuit including a current source coupled to a bit line associated with a programmable resistive memory element; a dummy path configured for selective coupling to the bit line prior to activation of a word line associated with the memory element, wherein the passage of current through the bit line and dummy path precharges the bit line; and control circuitry for decoupling the dummy path from the bit line and for activating the word line associated with the memory element upon achieving a desired operating point of bit line current and bit line voltage, so as to cause current from the bit line to flow for a period of time selected to program the memory element to one of a low resistance state and a high resistance state.

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Patent Owner(s)

Patent OwnerAddress
INFINEON TECHNOLOGIES NORTH AMERICA CORPINTELLECTUAL PROPERTY DEPARTMENT 1730 NORTH FIRST STREET SAN JOSE CA 95112

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Inventor(s)

Inventor Name Address # of filed Patents Total Citations
Lamorey, Mark C H South Burlington, VT 50 265
Nirschl, Thomas Essex Junction, VT 84 1215

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