Method for manufacturing high flatness silicon wafer
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United States of America Patent
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Issued Date -
Aug 28, 2008
app pub date -
Dec 27, 2007
filing date -
Dec 29, 2006
priority date (Note) -
Abandoned
status (Latency Note)
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Abstract
The present invention relates to a method for manufacturing a high flatness silicon wafer comprising (S21) slicing a silicon single crystal ingot to produce a wafer; (S22) chamfering an edge of the wafer sliced from the ingot; (S23) lapping the edge-chamfered wafer; (S24) etching the lapped wafer; (S25) grinding the etched wafer; (S26) slight-etching the ground wafer using an alkali aqueous solution to remove a surface degraded layer generated on the ground wafer; (S27) polishing one or two surfaces of the slight-etched wafer; and (S28) cleaning the polished wafer.
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