Multiple layer random accessing memory
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United States of America Patent
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Issued Date -
Aug 28, 2008
app pub date -
Feb 23, 2007
filing date -
Feb 23, 2007
priority date (Note) -
Abandoned
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Abstract
The present invention provides a new semiconductor Random Access Memory, RAM which stores multiple bits per cell. When writing data, at least three levels of voltage sources are generated to charge the bit line and the RAM capacitive device through the selective devices. During reading data, at least three referencing voltage sources are input to at least three sense amplifiers to differentiate at least four levels of bit line voltages and convert the differential levels to at least two logic bits.
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